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(R)
SP6200/6201
Micropower, 100mA and 200mA CMOS LDO Regulators
FEATURES
Tiny DFN Package (2mmX3mm) Low Dropout Voltage: 160mV @ 100mA High Output Voltage Accuracy: 2% Ultra Low Shutdown Current: 1A Max Ultra Low GND Current: * 200A @ 200mA Load * 28A @ 100A Load Extremely Tight Load and Line Regulation Current and Thermal Limiting RESET Output (VOUT good) Logic-Controlled Electronic Enable Unconditionally Stable with 1F Ceramic Fixed Outputs: * 1.5V, 1.8V, 2.5V, 2.7V, 2.85V, 3.0V, 3.3V, 3.5V, 5V Adjustable Output Available
NC 1 VIN 2 VOUT 3 NC 4 8 EN
SP6201
8 Pin DFN
7 GND 6 NC 5 RESET
Now Available in Lead Free Packaging
APPLICATIONS
Cellular Telephones Laptop, Notebooks and Palmtop Computers Battery-Powered Equipment Consumer/ Personal Electronics SMPS Post-Regulator DC-to-DC Modules Medical Devices Data Cable Pagers
DESCRIPTION
The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1F ceramic output capacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature is provided on all versions. The SP6200/6201 is available in fixed and adjustable output voltage versions in tiny DFN and small SOT-23-5 packages. A VOUT good indicator is provided on all fixed output versions.
TYPICAL APPLICATION CIRCUIT
Fixed Output Voltage
470k VIN 1 CIN = 1F 2
Enable Shutdown
5
VOUT COUT = 1F
SP6200 SP6201
4
3 EN
EN (pin 3) may be connected directly to IN (pin 1).
RSN (VOUT good)
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS, NOTE 1
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. Supply Input Voltage (VIN) ............................. -2V to 7V Output Voltage (VOUT) ......................... -0.6 to (VIN +1V) Enable Input Voltage (VEN) ............................ -2V to 7V Power Dissipation (PD) .......... Internally Limited, Note 3 Lead Temperature (soldering 5s) ....................... 260C Storage Temperature ........................ -65C to +150C
OPERATING RATINGS, NOTE 2
Input Voltage (VIN)..................................+2.5V to +6V Enable Input Voltage (VEN)..........................0V to +6V Junction Temperature (TJ)................-40C to +125C Thermal Resistance (See Note 3): SOT-23-5 (JA)...................................................90C/W 8 Pin DFN (JA)............................................ .....59C/W (See Note 3)
ELECTRICAL CHARACTERISTICS
VIN = VOUT +1V, VO = 5V for ADJ, IL = 100A, CIN = 1.0F, COUT = 1.0F, TJ = 25C , unless otherwise specified. The denotes the specifications which apply over the full operating temperature range, unless otherwise specified.
PARAMETER Output Voltage Accuracy, (VO) Reference Voltage Output Voltage Temperature Coefficient, Note 4, (VO/T) Minimum Supply Voltage
MIN -2 -3 1.213
TYP
MAX 2 3
UNIT % % V ppm/ C

CONDITIONS Variation from specified VOUT Adjustable version only
1.250 60 2.50 2.55 2.70 3.00 0.03 0.07 0.14 0.3 0.3 0.2 70 160 320
1.287
2.70 2.80 2.95 3.50 0.2 0.25 0.50 1 1 4 7 120 160 250 300 400 500 1 40 45 200 250 400 500
V V V V %/ V % % % % mV mV mV mV mV mV mV mV A A A A A A A dB
IL = 100A IL = 50mA IL = 100mA IC = 200mA VIN = (VOUT + 1V) to 6V IL = 0.1mA to 100mA, SP6200 IL = 0.1mA to 200mA, SP6201 IL = 0.1mA to 100mA, VIN = 2.95V IL = 0.1mA to 200mA, VIN = 3.5V IL = 100A IL = 50mA IL = 100mA IL = 200mA, SP6201 Only VEN 2.0V, IL = 100mA, SP6200 only (for 1.5 & 1.8, VIN = 2.95) VEN 2.0V, IL = 200mA, SP6201 Only (for 1.5 & 1.8, VIN = 3.5) Frequency =100Hz, IL =10mA Frequency = 400Hz, IL=10mA SP6200 SP6201 Turns On Turns Off VEN 0.4V VEN 2.0V, IL = 100A
Line Regulation, (VO/ VIN) Load Regulation, Note 5, (VO / VO) SP6200-1.5V & 1.8 Load Regulation SP6201-1.5V & 1.8 Load Regulation Dropout Voltage, Note 6, (VIN - VO) (Not applicable to voltage options below 2.7V)
Shutdown Quiescent Current, (IGND) Ground Pin Current, Note 7, (IGND)
0.01 28 110 200
Power Supply Rejection Ratio, (PSRR) Current Limit, (ICL) Thermal Limit 100 300
78 40 140 420 162 147 200 600
mA mA C C
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS: Continued
VIN = VOUT +1V, VO = 5V for ADJ, IL = 100A, CIN = 1.0F, COUT = 1.0F, TJ = 25C , unless otherwise specified. The denotes the specifications which apply over the full operating temperature range, unless otherwise specified.
PARAMETER Thermal Regulation, Note 8, (VO/PD) Output Noise, (e no)
MIN
TYP 0.05
MAX
UNITS %/W
CONDITIONS
150 ENABLE INPUT Enable Input Logic-Low Voltage, (VIL) Enable Input Logic-High Voltage, (VIH) Enable Input Current, (IIL), (IIH) Reset Not Output -2 1.6 0.01 0.01 -4 1 1 -6 0.4
Vrms
IL = 50mA, CL = 1F 0.1F from VOUT to Adj. 10Hz to 100kHz Regulator Shutdown Regulator Enabled VIL < 0.4V VIH > 2.0V Threshold
V V A A %
Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. Note 3. The maximum allowable power dissipation at any TA (ambient temperature) is PD (MAX) = (TJ (MAX) - TA) / A. Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown. The JA of the SP6200/6201 (all versions) is 90C/W for the SOT-23-5 and 59C/W for the DFN package on a standard 4 layer board (see "Thermal Considerations" section for further details). Note 4. Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Note 5. Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range; from 0.1mA to 100mA, SP6200; from 0.1mA to 200mA, SP6201. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Not applicable to output voltages less than 2.5V. Note 6. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Not applicable to output voltages less than 2.7V. Note 7. Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 8. Thermal regulation is defined as the change in output voltage at a time "t" after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at VIN = 6V for t = 10ms.
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
3
VIN
Current Limit and Thermal Shutdown
OUT
VOUT COUT
Enable
VREF
Bandgap REF 1.25V
R2
-
+
R PULL R1 RSN
1.20V
RESET
GND
Figure 1. Fixed Voltage Regulator
VIN
IN
OUT
VOUT
C OUT
Enable
EN
VREF
Bandgap REF 1.25V
+
Current Limit and Thermal Shutdown
R2 C BYP (option) ADJ
R1 RSN
1.20V
VOUT = V REF
R2 +1 R1
GND
Figure 2. Adjustable Voltage Regulator
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
4
PIN DESCRIPTION
PIN NUMBER 1 2 3 4 4 5
NAME IN GND EN RSN (Reset Not) ADJ OUT
FUNCTION Supply Input Ground Enable/Shutdown (Input): CMOS or TTL compatible input. Logic high = enable, logic low = shutdown Open drain indicating that VOUT is good Adjustable (Input): Adjustable regulator feedback input. Connect resistor voltage divider. Regulator Output
PIN NUMBER 1 2 3 4 5 6 7 8
NAME NC VIN VOUT NC RSN NC GND EN
(8 Pin DFN) FUNCTION No Connect Supply Input Regulator Input No Connect Open drain indicating that VOUT is good No Connect Ground Enable/Shutdown (Input): CMOS or TTL compatible input. Logic high = enable, logic low = shutdown
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
5
THEORY OF OPERATION
General Overview The SP6200 and SP6201 are CMOS LDOs designed to meet a broad range of applications that require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide load range and guarantee stability with a 1F ceramic output capacitor. They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. Thus, overall system accuracy is maintained under all DC and AC conditions. Enable feature is provided on all versions. A Vout good indicator (RSN pin) is provided in all the fixed output voltage devices. An adjustable output version is also available. Current Limit and Thermal protection is provided internally and is well controlled. Architecture The SP6200 and SP6201 are only different in their current limit threshold. The SP6200 has a current limit of 140mA, while the SP6201 current limit is 420mA. The SP6201 can provide pulsed load current of 300mA. The LDOs have a two stage amplifier which handles an extremely wide load range (10A to 300mA) and guarantees stability with a 1F ceramic load capacitor. The LDO amplifier has excellent gain and thus touts PSRR performance not found in other CMOS LDOs. The amplifier guarantees no overshoot on power up or while enabled through the EN pin. The amplifier also contains an active pull down, so that when the load is removed quickly the output voltage transient is minimal; thus output deviation due to load transient is small and fairly well matched when connecting and disconnecting the load.
An accurate 1.250V bandgap reference is bootstrapped to the output in fixed output versions of 2.7V and higher. This increases both the low frequency and high frequency PSRR. The adjustable version also has the bandgap reference bootstrapped to the output, thus the lowest externally programmable output voltage is 2.7V. The 2.5V fixed output version has the bandgap always connected to the Vin pin. Unlike many LDOs, the bandgap reference is not brought out for filtering by the user. This tradeoff was maid to maintain good PSRR at high frequency (PSRR can be degraded in a system due to switching noise coupling into this pin). Also, often leakages of the bypass capacitor or other components cause an error on this high impedance bandgap node. Thus, this tradeoff has been made with "ease of use" in mind. Protection Current limit behavior is very well controlled, providing less than 10% variation in the current limit threshold over the entire temperature range for both SP6200 and SP6201. The SP6200 has a current limit of 140mA, while the SP6201 has a current limit of 420mA. Thermal shutdown activates at 162C and deactivates at 147C. Thermal shutdown is very repeatable with only a 2 to 3 degree variation from device to device. Thermal shutdown changes by only 1 to 2 degrees with Vin change from 4V to 7V. Enable (Shutdown Not) Input The LDOs are turned off by pulling the EN pin low and turned on by pulling it high. If it is not necessary to shut down the LDO, the EN (pin 3) should be tied to IN (pin 1) to keep the regulator output on at all time. The enable threshold is 0.9V and does not change more than 100mV over the entire temperature and Vin voltage range. The lot to lot variations in Enable Threshold is also within 100mV. Shutdown current is guaranteed to be <1uA without requiring the user to pull enable all the way to 0V. Standard TTL or CMOS levels will transition the device from totally on to totally off.
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
6
THEORY OF OPERATION: Continued Reset Not (VOUT good) Output An accurate Vout good indicator is provided on all the fixed output version devices, pin 4 (RSN), Figure 1. This is an open drain, logic output that can be used to hold a microprocessor or microcontroller in a RESET condition when it's power supplied by Vout is 4% out of nominal regulation. A 1% hysteresis is included in the Reset Not function, so that false alarms are not issued as a result of LDO's output noise. The Reset Not function reacts in 10 to 50s. Adjustable Output Version The adjustable version can be programmed to any voltage from 2.7V to 6V for the industrial temperature range; 2.5V to 6V for the commercial temperature range. The output can not be programmed below 2.5V due a headroom restriction. Since the bandgap is bootstrapped to the output, the output voltage must be above the minimum bandgap supply voltage. The bandgap requires 2.7V or greater at -40C and requires 2.5V or greater at 0C. The regulator's output can be adjusted to a specific output voltage by using two external resistors, Figure 2. The resistor's set the output voltage based on the following equation: VOUT = 1.25 (R2/R1 + 1) Resistor values are not critical because the ADJ node has a high input impedance, but for best results use resistors of 470k or less. A capacitor from ADJ to Vout pin provides improved noise performance as is shown in the following plot.
Noise Performance 10Hz to 100kHz
400
Input Capacitor A small capacitor, 1F or higher, is required from VIN to GND to create a high frequency bypass for the LDO amplifier. Any ceramic or tantalum capacitor may be used at the input. Capacitor ESR (effective series resistance) should be smaller than 3. Output Capacitor An output capacitor is required between VOUT and GND to prevent oscillation. A capacitance as low as 0.22F can fulfill stability requirements in most applications. A 1F capacitor will ensure unconditional stability from no load to full load over the entire input voltage, output voltage and temperature range. Larger capacitor values improve the regulator's transient response. The output capacitor value may be increased without limit. The output capacitor should have an ESR (effective series resistance) below 5 and a resonant frequency above 1MHz. No Load Stability The SP6200/6201 will remain stable and in regulation with no external load (other than the internal voltage driver) unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications. Thermal Considerations The SP6200 is designed to provide 100mA of continuous current, while the SP6201 will provide 200mA of continuous current. Maximum power dissipation can be calculated based on the output current and the voltage drop across the part. To determine the maximum power dissipation in the package, use the junction-to-ambient thermal resistance of the device and the following basic equation: (T -T ) PD = J(max) A JA TJ(max) is the maximum junction temperature of the die and is 125C. TA is the ambient operating. JA is the junction-to-ambient thermal resistance for the regulator and is layout dependent. The actual power dissipation of the regulator circuit can be determined using one simple
Adj, Vin = 4.3V, Vout = 3.3V (Cin = Cout = 1uF)
Output Noise (uVrms)
300
200
100
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.0E+07
Bypass Cap from Vout to FB (pF)
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
7
THEORY OF OPERATION: Continued equation: PD = (VIN - VOUT)*IOUT + VIN*IGND (VIN - VOUT) * IOUT Substituting PD(max) for PD and solving for the operating conditions that are critical to the application will give the maximum operating conditions for the regulator circuit. For example, if we are operating the SP6201- 3.0V at room temperature, with a SOT-23-5 package on a 4 layer standard board we can determine the maximum input voltage for a set output current. PD(max) = (125C -25C) = 1.1W (90C/W) To prevent the device from entering thermal shutdown, maximum power dissipation can not be exceeded. Using the output voltage of 3.0V and an output current of 200 mA, the maximum input voltage can be determined. Ground pin current can be taken from the electrical spec'stable (IGND=200uA at IOUT=200uA). The maximum input voltage is determined as follows: 1.1W = (VIN - 3.0V)*200mA + VIN*0.2mA Solving for VIN, we get: VIN = (1.1W + 0.6W) 200.2mA After calculations, we find that the maximum input voltage of a 3.0V application at 200mA of output current in an SOT-23-5 package is 8.4V. Dual-Supply Operation When used in dual supply systems where the regulator load is returned to a negative supply, the output voltage must be diode clamped to ground.
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
8
TYPICAL CHARACTERISTICS
27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified.
Dropout vs. Io (SP6201 fixed 3.0V)
400 350 300 T=125 deg
Dropout vs. Temp (SP6201 fixed 3.0V)
400 350
Dropout (mV)
Dropout (mV)
T=27deg T=-40 deg
300 250 200 150 100 50
Io=200mA Io=100mA Io=50mA
250 200 150 100 50 0 0 50 100 150 200
0 -50
-20
10
40
70
100
130
Io (mA)
Temp (deg)
Dropout vs. Temp (SP6201 fixed 3.0V)
2.5 Io=1mA 2.0 Io=0.1mA
Iq (uA)
50 45 40 35 30 25 20 15 10 5 0 EN = Vin EN = 0V
Iq vs. Vin (fixed 3.0V, Io=0uA)
35 30 25 20 15 10 5 0 0 1 2 3 Vin (V) 4 5 6 7
Dropout (mV)
1.5 1.0 0.5 0.0 -50 -20 10 40 70 100 130
Temp (deg)
Iq vs. Temp (SP6201 fixed 3.0V, EN=Vin, Io=0uA)
50 250
Iq vs. Temp (SP6201 fixed 3.0V, EN=0V, Io=0uA)
Vin = 7V Vin = 5.5V Vin = 4V
150
45
Vin = 7V Vin =5.5V Vin = 4V
200
Iq (uA)
Iq (nA)
40
35
100
30
50
25 -50
-20
10
40
70
100
130
0 -50
-20
10
40
70
100
130
Temp (deg)
Temp (deg)
Ignd vs. Vin (SP6201 fixed 3.0V)
350 300 250 Io=200mA Io=150mA Io=100mA Io=50mA Io=0.1mA
Ignd vs. Io (SP6201 fixed 3.0V)
220 195 170
Ignd (uA)
Vin = 7V Vin = 5.5V Vin = 4V
Ignd (uA)
200 150 100 50 0 3
145 120 95 70 45 20
4
5 Vin (V)
6
7
0
50
100 Io (mA)
150
200
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
9
Iq (nA)
TYPICAL CHARACTERISTICS: Continued
27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified.
Vout vs. Temp (fixed 3.3V)
3.33
Vout vs. Temp (fixed 3.0V)
3.03 3.02 3.01 Vin = 7V Vin = 4V
3.31 Vin = 7V Vin = 4V
3.32
Vout (V)
Vout (V)
-50 -20 10 40 Temp (deg) 70 100 130
3.00 2.99 2.98 2.97
3.30 3.29 3.28 3.27 -50 -20 10 40 70 100 130
Temp (deg)
Vout vs. Temp (adjustable)
2.90
Vout vs. Temp (adjustable)
3.35
2.85
3.25 3.3Vout
Vout (V)
Vout (V)
2.80
2.85Vout 2.7Vout
3.0Vout 3.15
2.75
2.70
3.05
2.65 -50
2.95
-20 10 40 70 100 130
-50
-20
10
40
70
100
130
Temp (deg)
Temp (deg)
Vout vs. Temp (adjustable)
2.525 2.520 2.515 2.510
Vout vs. Temp (adjustable)
5.05 5.04
2.5Vout
5.03 5.02
5.0Vout
Vout (V)
Vout (V)
2.505 2.500 2.495 2.490 2.485 2.480 2.475 -50 -20 10 40 70 100 130
5.01 5.00 4.99 4.98 4.97 4.96 4.95 -50 -20 10 40 70 100 130
Temp (deg)
Temp (deg)
Line Regulation (SP6201 fixed 3.0V)
3.006 3.004 Io=0.1mA Io=1mA Io=50mA Io=100mA Io=200mA
Load Regulation (SP6201 fixed 3.0V)
3.004 3.002 3.000 Vin = 7V Vin = 5.5V Vin = 4V
Vout (V)
3.002 3.000 2.998 2.996 2.994 3
Vout (V)
2.998 2.996 2.994 2.992
4
5
6
7
0
50
100
150
200
250
300
Vin (V)
Io (mA)
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
10
TYPICAL CHARACTERISTICS: Continued
27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified.
Current Limit vs. Temp (fixed 3.3V, Vin=4V)
600 SP6201-3.3 500
Current Limit vs. Temp (fixed 3.3V, Vin=4V)
200 SP6200-3.3
Icl (mA)
Icl (mA)
0 50 100 150
150
400
300 -50
100 -50
0
50
100
150
Temp (deg)
Temp (deg)
Turn on time, Io=1mA, 4Vin
VOUT
3V
Turn on time, Io=100mA, 4Vin
VOUT SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 100mA Cin = Cout = 1uF Cer. Cap
3V 2V 1V 0V
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 1mA Cin = Cout = 1uF Cer. Cap
2V 1V 0V
VEN
4V 2V 0V
VEN
4V 2V 0V
Turn on time, Io=300mA, 4Vin
VOUT SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 300mA Cin = Cout = 1uF Cer. Cap
Turn on time, Io=100mA, 7Vin
VOUT
3V 2V 1V 0V
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 7V Iout = 100mA Cin = Cout = 1uF Cer. Cap
3V 2V 1V 0V
VEN
VEN
4V 2V 0V
4V 2V 0V
Turn off time, Io=1mA, 4Vin
Turn off time, Io=50mA, 4Vin
3V 2V 1V 0V
VOUT
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout= 1mA Cin = Cout = 1uF Cer. Cap
VOUT
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 50mA Cin = Cout = 1uF Cer. Cap
3V 2V 1V 0V
VEN
4V 2V 0V
VEN
4V 2V 0V
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
11
TYPICAL CHARACTERISTICS: Continued
27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified.
Turn off time, Io=100mA, 4Vin
Turn off time, Io=100mA, 7Vin
VOUT
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 4V Iout = 100mA Cin = Cout = 1uF Cer. Cap
3V 2V 1V 0V
VOUT
SP6201 - 3.0Vout fixed Ven is toggled, Vin = 7V Iout = 100mA Cin = Cout = 1uF Cer. Cap
3V 2V 1V 0V
VEN
4V 2V 0V
VEN
4V 2V 0V
Inrush Current, Io=100mA
750mA
650mA
Inrush Current, Io=100uA
500mA
650mA
SP6201 - 3.0Vout fixed, Vin=4V Ven is toggled, Iout=100mA Cin = Cout = 1uF Cer. Cap
500mA 250mA 0mA
SP6201 - 3.0Vout fixed, Vin=4V Ven is toggled, Iout = 100uA Cin = Cout = 1uF Cer. Cap II
250mA 0mA
VOUT
2V 0V
VOUT
2V 0V
VEN
4V 2V 0V
VEN
4V 2V 0V
Load Transient Response, 100mA step, 4Vin
80mV 60mV
Load Transient Response, 100mA step, 7Vin
80mV 60mV
SP6201 - 3.0Vout fixed Vin = 4V, Iout = 100mA Cin = Cout = 1uF Cer. Cap
VOUT
40mV 20mV 0mV -20mV -40mV
SP6201 - 3.0Vout fixed Vin = 7V , Iout = 100mA Cin = Cout = 1uF Cer. Cap
VOUT
40mV 20mV 0mV -20mV -40mV
100uA
IOUT
Tr = Tf = 100ns
100mA 0mA
100uA
IOUT
Tr = Tf = 100ns
100mA 0mA
Load Transient Response, 200mA step, 4Vin
200mV 150mV
Load Transient Response, 300mA step, 4Vin
200mV 150mV
SP6201 - 3.0Vout fixed Vin = 4V , Iout = 200mA Cin = Cout = 1uF Cer. Cap
VOUT
100mV 50mV 0mV -50mV
SP6201 - 3.0Vout fixed Vin = 4V, Iout = 300mA Cin = Cout = 1uF Cer. Cap
VOUT
100mV 50mV 0mV -50mV
IOUT
200mA
100uA
IOUT
100uA
Tr = Tf = 100ns
100mA 0mA
Tr = Tf = 100ns
200mA 0mA
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
12
TYPICAL CHARACTERISTICS: Continued
27C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1F unless otherwise specified.
Power Supply Rejection Ratio
REF LEVEL 0.000dB /DIV 10.000dB
Power Supply Rejection Ratio
REF LEVEL 0.000dB /DIV 10.000dB
0
0
-20
-20
(dB)
-40
(dB)
-40
-60
-60
-80
IOUT = 100A COUT = 1F VIN = 4V VOUT = 3V
10 100
10.000Hz
-80
IOUT = 1mA COUT = 2.2F
10 100
10.000Hz
-100 1k 10k 100k 1M 10M
START STOP 10 000 000.000Hz
-100 1k 10k 100k 1M 10M
START STOP 10 000 000.000Hz
Frequency (HZ)
Frequency (HZ)
Power Supply Rejection Ratio
REF LEVEL 0.000dB /DIV 10.000dB
REF LEVEL 0.000dB
Power Supply Rejection Ratio
/DIV 10.000dB
0
0
-20
-20
-40
(dB)
(dB)
-40
-60
-60
-80
IOUT = 10mA COUT = 2.2F
100
10.000Hz
-80
IOUT = 100mA COUT = 2.2F
100
10.000Hz
-100 10
START
-100 10
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
START
STOP 10 000 000.000Hz
STOP 10 000 000.000Hz
Frequency (HZ)
Frequency (HZ)
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
13
PACKAGE: 5 PIN SOT-23
D e1
N
N/2 +1 E/2
H B
E
E1/2 E1
B
SEE VIEW C
1 e
2
N/2
O1
b
Dimensions in (mm)
5 PIN SOT-23 JEDEC MO-178 (AA) Variation MIN NOM MAX 0 0.90 0.30 0.08 1.15 2.90 BSC 0.95 BSC 1.90 BSC 2.80 BSC 1.60 BSC 0.30 0.45 0.60 REF 0.25 BSC 0 5 4 10 8 15 0.60 1.45 0.15 1.30 0.50 0.22
Gauge Plane Seating Plane
4X O1
L L1
O
L2
A A1 A2 b c D e e1 E E1 L L1 L2 O O1
VIEW C
A
A2
A1
SIDE VIEW
b
WITH PLATING
c
BASE METAL
5 PIN SOT-23
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
14
PACKAGE: 8 PIN DFN
Top View
D D/2 1 2
Bottom View
D2
E/2
E
E2
K L b
Pin 1 identifier to be located within this shaded area. Terminal #1 Index Area (D/2 * E/2)
e
Side View
2x3 8 Pin DFN JEDEC mo-229C (VCED-2) Variation Symbol A
Dimensions in (mm) MIN 0.80 0 0.18
NOM 0.90 0.02 0.20 0.25 2.00 BSC
MAX 1.00 0.05 0.30
A
A1 A3
A1 A3 b D D2 e E E2 K L
1.50 1.60 0.20 0.30
0.50 3.00 BSC 0.40
1.75 1.90 0.50
2x3 8 Pin DFN
Date:5/25/04 SP6200/6201 100/200mA CMOS LDO Regulator (c) Copyright 2004 Sipex Corporation
15
ORDERING INFORMATION
Part Number Topmark Temperature Range Package Type SP6200EM5-1.5 ................... E15 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-1.5/TR ............. E15 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-1.8 ................... E18 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-1.8/TR ............. E18 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-2.5 ................... E25 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-2.5/TR ............. E25 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-2.7 ................... E27 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-2.7/TR ............. E27 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-2.85 ................ E285 ....................... -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-2.85/TR .......... E285 ....................... -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-3.0 ................... E30 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-3.0/TR ............. E30 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-3.3 ................... E33 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-3.3/TR ............. E33 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-3.5 ................... E35 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-3.5/TR ............. E35 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-5.0 ................... E50 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-5.0/TR ............. E50 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6200EM5-ADJ ................ EADJ ...................... -40C to +125C ......................... 5 Pin SOT-23 SP6200EM5-ADJ/TR .......... EADJ ...................... -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201EM5-1.5 ................... F15 ........................ -40C to +125C ........................ 5 Pin SOT-23 SP6201EM5-1.5/TR ............. F15 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201EM5-1.8 ................... F18 ........................ -40C to +125C ........................ 5 Pin SOT-23 SP6201EM5-1.8/TR ............. F18 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23
Available in lead free packaging. To order add "-L" suffix to part number. Example: SP6200EM5-1.5/TR = standard; SP6200EM5-1.5-L/TR = lead free /TR = Tape and Reel Pack quantity is 2500 for SOT-23 and 3,000 for DFN.
Corporation
ANALOG EXCELLENCE
Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Date:5/25/04 SP6200/6201 100/200mA CMOS LDO Regulator (c) Copyright 2004 Sipex Corporation
16
ORDERING INFORMATION
Part Number Topmark Temperature Range Package Type SP6201ER-1.8.....................ER18.........................-60C to +125C.......................... 8 Pin DFN SP6201ER-1.8/TR...............ER18.........................-60C to +125C....(Tape & Reel) 8 Pin DFN SP6201EM5-2.5 ................... F25 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-2.5/TR ............. F25 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201EM5-2.7 ................... F27 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-2.7/TR ............. F27 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201EM5-2.85 ................ F285 ....................... -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-2.85/TR .......... F285 ....................... -40C to +125C .(Tape & Reel) 5 Pin SOT-23 SP6201EM5-3.0 ................... F30 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-3.0/TR ............. F30 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201EM5-3.3 ................... F33 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-3.3/TR ............. F33 ........................ -40C to +125C . (Tape & Reel) 5 Pin SOT-23 SP6201ER-3.3......................ER33........................-60C to +125C.......................... 8 Pin DFN SP6201ER-3.3/TR................ER33........................-60C to +125C....(Tape & Reel) 8 Pin DFN SP6201EM5-3.5 ................... F35 ........................ -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-3.5/TR ............. F35 ........................ -40C to +125C .(Tape & Reel) 5 Pin SOT-23 SP6201EM5- 5.0 .................. F50 ........................ -40C to +125C ....................... . 5 Pin SOT-23 SP6201EM5/TR ................... F50 ........................ -40C to +125C .(Tape & Reel) 5 Pin SOT-23 SP6201EM5-ADJ ................ FADJ ...................... -40C to +125C ......................... 5 Pin SOT-23 SP6201EM5-ADJ/TR .......... FADJ ...................... -40C to +125C .(Tape & Reel) 5 Pin SOT-23
Available in lead free packaging. To order add "-L" suffix to part number. Example: SP6200EM5-1.5/TR = standard; SP6200EM5-1.5-L/TR = lead free /TR = Tape and Reel Pack quantity is 2500 for SOT-23 and 3,000 for DFN.
Corporation
ANALOG EXCELLENCE
Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Date:5/25/04
SP6200/6201 100/200mA CMOS LDO Regulator
(c) Copyright 2004 Sipex Corporation
17

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